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1. introductionUSB2.0 camera microprocessor supports high-speed USB2.0 interface, embedded powerful image post-processing unit, JPEG high-speed codec, supports up to 2 million pixel CMOS sensor interface and CCD sensor interface, processor design products can be realized The unique motion monitoring function and face tracking function not only greatly enhance the display effect, but also improve the quality of the picture, and further expand the application field of the PC camera, such as enhanced real-time video chat function and access control monitoring system.
Main functions: USB2.0 high-speed transmission and compatible with USB1.1; high-speed image post-processing unit; JPEG high-speed codec; 30 frames/sec high-speed transmission under VGA; CMOS/CCD interface; built-in 8-bit microcontroller.
Not equipped with the above advanced features, but also has the following scalability: multiple GPIO interfaces provide unlimited possibilities for adding continuous shooting, LED indicators, shortcut keys, etc.; USB2.0 compatible with USB1.1, for the camera Extensive use adds security; supports multiple operating systems such as 64-bit Window, Windows XP, Linux, Mac, VxWorks, WinCE and more. The following is an introduction to the hardware design method and peripheral circuit distribution of the USB2.0 camera microprocessor.
2. System hardware design
2.1 Oscillator
The clock frequency of the USB2.0 camera microprocessor is 12MHz, and the external clock frequency stability must be less than ±50ppm. FIG. 1 is a design reference diagram of an oscillator circuit.
2.2 Reset
After power-up, the reset signal must be stopped at the low setting for a minimum of 10ms to stabilize the signal from the oscillator. The chipset will enter a steady state after 341μs.
Figure 2 shows the reset circuit. The diode (D) is used to speed up the discharge of the capacitor (C) when the power is turned off. If the PCB space is insufficient, you can choose to remove D. Figure 3 shows the power-on sequence.
2.3 Power and ground
2.3.1 Types of power and ground
The power supply consists of a digital part and an analog part.
2.3.2 Power Circuit
This circuit uses a single power supply mode. The external power supply supplies 3.3V of I/O power to the chip, and its built-in PR (power regulator) output 1.8V is supplied from the DVDD pin to the USB-VDDL. The built-in PR circuit requires a capacitor of at least 10uF to be placed closest to the DVDD pin. These regulators must be able to automatically switch to a low-power condition when entering standby mode. Figure 4 shows the 3.3V power supply circuit.
3, peripheral circuit distribution
USB2.0 camera microprocessor peripheral interface distribution mainly includes: USB2.0 interface; EEPROM interface; sensor interface; Other functions PIN interface and USB2.0 PCB layout.
3.1 USB2.0 interface
The USB2.0 interface is shown in Table 2.
USB_VRES is the voltage reference value of the USB interface. The pull-down resistor of USB_VRES should be more accurate (recommended value 6.2K ± 1% Ohm).
3.2 EEPROM interface
The EEPROM interface is shown in Table 3.
If you need to add a new VID and PID or sensor configuration, you need a 2-wire serial EEPROM. Figure 5 is an application circuit of the EEPROM.
The ESCK pin is used to select the EEPROM size. A pull-up resistor is required when the EEPROM is larger than 16k bit. The ESCK is pulled down when the EEPROM is less than or equal to 16k bit. When you want to support a new CMOS sensor chip, you need to plug in a 64k bit EEPROM.
The EEPROM can help change the PID, but when there is no EEPROM, the ESCK pin can be used to make a PID selection.
3.3 Sensor Interface
The sensor interface has 10 (10-bit) data lines. When only 8 (8-bit) data lines are used, the lower two data lines (CS_D1, CS_D0) should be connected to the LOW level. Connect a resistor (220 Hz recommended) to the CS_CLK and CS_PCLK pin pins and place them as close as possible to the DSP to reduce the reflected signal.
Both CS_SCK and CS_SDA are used as opendrain, pulled up internally. CS_PWDB controls the power of the sensor. When the video is turned on, CS_PWDB transitions from a low setting to a high setting to turn on the sensor. When the video is turned off, the operation of CS_PWDB is reversed to turn off the power to the sensor. In standby mode, since the USB standby current limit is 500uA, CS_PWDB can also output low-level settings.
If the PIXCLK does not give feedback to the chip, the sensor can also be operated by setting the EEPROM.
3.4 Other function pins
The TEST pin needs to be connected to ground with a 47KOhm resistor. GPIO_FLIP and PRIVACY should be connected to HIGH under normal conditions. If GPIO_FLIP is LOW, the image will be rotated 180 degrees. If PRIVACY is LOW, the image will turn black. If you need SNAPB function, you can connect a 4.7KObm resistor to I/OPower and connect a button to the ground. Press this button to take a static picture. GPIO_PWM is used to output a PWM signal.
3.5 USB2.0 PCB layout guide
The transfer schedule of USB DP and DM is determined by the design guidelines for high speed (F/S) USB 2.0.
The differential line impedance of USB DP and DM is 90 ohm ± 15%.
To maximize ESD immunity, industrial designs need to expose the USB connections as little as possible.
The USB DP/DM cable is wider than 22 mils (1 mil = 25.4 μm) and has a 7 mil pitch. A continuous ground wire is required under the DP/DM connection as required, and the ground wire behind the DP/DMPCB cannot be separated or through.
Make sure that the unrelated signal connections, power supplies, and components are away from the DP/DM connection. A common standard is to maintain a minimum distance of 35 mils.
Keep large capacitors at the USB_5V power connector.
The decoupling capacitor needs to be placed closest to the chip.
A ferrite can be placed at USB_5V to expand ESD immunity if needed. If not required, an impedance of 0 Ohm can be placed on the board. The ferrite must be low DCR (<100 mOhms). If you are using a mini-B type interface, you need to place the ferrite on a different layer than the chip.
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