PWM to linear signal conversion circuit

Abstract: This article introduces a circuit that converts a low-voltage PWM signal into an amplified, buffered linear output. It is suitable for fan speed control and allows linear control of a 12V fan at 3.3V input.

Maxim provides various fan speed controllers with PWM output to make the fan speed change with temperature. This control scheme is realized by periodically controlling the fan power on and off, and the fan speed is set by the duty cycle of the PWM signal. The typical application circuit of this scheme is acceptable in most cases. However, in some cases, because the fan modulation can generate noisy noise, a fixed power supply is needed to power the fan. .

If the periodic power supply to the fan generates greater noise, you can consider using the circuit shown in Figure 1. In this case, a pair of complementary BJT tubes (Q1) and PMOS FET (Q2) form a linear amplifier

Figure 1. A simple circuit that converts a low-voltage PWM signal into an amplified, buffered linear output.
Figure 1. A simple circuit that converts a low-voltage PWM signal into an amplified, buffered linear output.

The working principle of this circuit is as follows: the base of the PNP tube in Q1 is the non-inverting input of the amplifier. The emitter of the NPN tube is an inverting input. The PNP tube is configured as a follower, and the NPN tube can be used as both a follower and a primary amplification unit. Since the PNP tube and the NPN tube work at approximately the same current density and temperature conditions, the two input voltages are approximately consistent with each other, and the current flowing out of the inverting input terminal is mirrored to the collector of the NPN tube, resulting in a voltage drop across the resistor R2. The voltage drop of R2 drives the VGS of Q2, which is amplified at the drain of Q2 and becomes the output of the amplifier. As the output of the amplifier increases, when the voltage reaches enough to make the current flowing out of the inverting input terminal zero, the stable operating point of the amplifier is reached.

The amplifier used here has an output offset of approximately 100mV, which is caused by forcing the voltage drop of R2 to reach the critical value of Q2 VGS. This is unreasonable for specified fan speed control applications. Set the amplifier gain to +4, suitable for 3.3V PWM signal. When the PWM signal reaches 100% duty cycle, the signal level reaches the maximum output swing of 12V.

For Q1, you can choose CMXT3946, which is a two-transistor complementary structure. Of course, you can also use discrete transistors instead, which does not substantially reduce performance. For most single fan drive systems, the ZXM61P02 PMOS FET can be selected, and its maximum power dissipation capability of 800mW can drive the fan with an output of up to 133mA and 6V. Since most fans are approximately resistive loads, fans with a peak current of 250mA or less than 12V are acceptable. Of course, the entire operating range of the fan should be tested to ensure that the power consumption is within the range allowed by the PMOS FET. When driving multiple fans, SOT23 devices should be replaced with SOIC-packaged MOSFETs.

This circuit does not give the component value of the input filter. Choose the cut-off frequency, 1 / [6.28 * R * C], which is at least two orders of magnitude higher than the PWM frequency to reduce the PWM signal ripple at the output. Due to the high input impedance of the circuit, the resistance value is allowed to be as high as 100k .


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