Digital image processing platform system solution

one. Project Overview 1.1 Project Background

Since the advent of digital image processing, it has been a cutting-edge research discipline, and it has been enduring for a long time. At the same time, with the advent of the digital age, the market is increasingly demanding digital image processing. Therefore, this project ------ FPGA-based multi-function digital image acquisition and processing platform is designed for a variety of equipment and applications that require digital image processing, for example, medical CT, X-ray, etc. Image enhancement and processing; various digital devices that need to support image optimization. At the same time, this platform can also be used for design reference and teaching demonstration of digital image processing related courses.

1.2 Project Advantages

The FPGA-based multi-function digital image acquisition and processing platform is a versatile, versatile digital processing platform that offers the following advantages over other similar designs:

1 Designed with a programmable FPGA to facilitate design updates and reduce the cost of upgrades;

2 The platform is implemented in hardware, which is faster than the software implementation method using DSP;

3 Each module is independent of each other, which is convenient for reuse of design and can be used for other projects after simple processing;

two. Demand Analysis 2.1 Functional Analysis

According to the design goals of this project, the functions that this design needs to accomplish are:

(1) Basic image enhancement, image smoothing, image sharpening, histogram equalization, histogram normalization, etc. can be performed on the input digital image, and frequency domain related Butterworth filtering, Gaussian filtering, etc. can also be performed.

(2) Advanced processing such as image edge detection can be accomplished by combining various basic image processing procedures.

(3) YCrCb format image data converted by CMOS sensor can be input and converted to RGB format.

(4) The image data of the digital image processor can be processed through the USB interface.

(5) The processed image can be saved in Flash, and the image generated during the processing can be displayed through VGA.

three. Solution design 3.1 System function realization principle

This design uses Xilinx's Nexys 3 Spartan-6 FPGA Board development board, which uses the large-capacity logic resources of the Xilinx Spartan®-6 FPGA (XC6LX16-CS324) to complete each module. The overall hardware block diagram of this design is shown in Figure 1. It can be clearly seen from Fig. 1 that the system is mainly composed of a USB device control unit, a color space conversion unit, a user control input unit, an overall control unit, a dual port RAM control unit, a flash control unit, a display control unit and an image processing unit.

The working principle of the system is as follows: the overall control unit selects the data source of the dual port RAM input terminal according to the user control input unit, and then the image processing unit reads out the data according to the output signal of the user control input unit to perform related processing on the image and output to the display RAM. Medium, displayed by the display control unit to the VGA, and saved to Flash according to user input. Please refer to the specific description of each unit module.

3.2 Hardware platform and resource configuration

Digital image processing platform system solution

Figure 1: Overall hardware block diagram 3.2 Hardware platform and resource configuration 3.2.1 USB control unit

The USB control unit is one of the sources of data for the entire system and occupies an important position in the system. Let us first look at the block diagram of its composition, as shown in Figure 2.

Digital image processing platform system solution

Figure 2: USB Control Unit Block Diagram

As can be seen from the above figure, the USB control unit is mainly composed of USB Packet Assemble/Dissemble, USB PL, USB FSM, and EP Buffer. USB FSM mainly implements USB function devices and communicates with Host Computer; USB Packet Assemble/Dissemble mainly completes unpacking and packaging of USB data packets, USB PL (USB Protocol Layer) implements USB protocol; and the module communicating with USB PHY is not drawn. Out.

3.2.2 Color Space Conversion Unit

The color space conversion unit performs an operation of converting CMOS input YCrCb format data into RGB data, and its composition block diagram is shown in FIG.

Digital image processing platform system solution

Figure 3: Color Conversion Unit

The format converted from YCrCb to RGB is as follows:

R = Y + 1.371 * (Cr - 128);

G = Y - 0.698 * (Cr - 128) - 0.336 * (Cb - 128);

B = Y + 1.732 * (Cb - 128);

Due to the special nature of the hardware implementation, the above formula is changed to:

R = Y + 1403 * ( Cr - 128 ) /1024;

G = Y - 714* ( Cr - 128 ) /1024 - 344 * ( Cb - 128 ) /1024 ;

B = Y + 1773 * ( Cb - 128 ) /1024;

3.2.3 Image Processing Unit

The image processing unit is the most important unit in the system, mainly for digital image processing related tasks such as histogram equalization, image sharpening, and frequency filtering. Its block diagram is shown in Figure 4:

Digital image processing platform system solution

Figure 4: Image Processing Unit

The image processing unit has basic digital image processing modules such as histogram equalization, image sharpening, and frequency filtering, which can be combined according to the user's choice to accomplish a specific task or purpose (such as image edge detection, etc.). .

3.2.4 Other control units

Other control units such as the overall control unit, the user input control unit, the dual-port RAM control unit, and the Flash control unit mainly perform operations such as control and flow control during system operation.

3.3 System Flowchart

From the analysis of each module of the above system, the function of each module and the overall architecture of the system have been fully understood. Now let us introduce the overall operation process of the system.

The overall system flow chart is shown in Figure 5:

Digital image processing platform system solution

Figure 5: System flow chart

The above figure is a simplified system flow chart showing the main path through which data flows through the system. After the power-on initialization, the data source of the dual-port RAM input terminal is selected according to the user control input unit, and then the image processing unit reads the data according to the output signal of the user control input unit to perform related processing on the image and output to the display RAM, and the display control unit Displayed to VGA and saved to Flash based on user input.

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