The experience of using block RAM in 6 series FPGAs (3)

The next step is to call IPcore to generate the IP of the ROM. The process is not much to talk about, unclear students can read the book, you can also simply browse. When the IPcore is established, the block memory generator is selected and the block RAM call is entered. The type of Memory is naturally chosen to be ROM. For simplicity, a single port ROM (single port ROM) is used, as shown in Figure 1.

The experience of using block RAM in 6 series FPGAs (3)

Figure 1 IP call
In the lower left position of Figure 1, there is a "datasheet". With a click, the manual for the IP is opened, and the name is "LogiCORE IP Block Memory Generator v4.2". This is the most comprehensive, and it is very practical to talk about all aspects of the IP use. Next is to configure the width and depth of the segment memory. This can be configured according to actual needs.
Since it is a ROM, there should be data that is "cured" in advance. In the third step of the IP configuration, there is a memory initialization option, where you can call a file of type .coe and reference the data stored in advance. The .coe file is also relatively simple to create. I usually create a new Notepad file, which is a .txt file, and store the pre-computed data, and then add the statement required by the file header, ie memory_iniTIalizaTIon_radix = 10;
memory_iniTIalizaTIon_vector =
3535
, -15105
, -2288
,-25620
,-19906
,-19879
,-42826
... (intermediate data is omitted)
, -7697
,-36317
,-28038;
Memory_initialization_radix refers to the data hexadecimal, 10 is naturally decimal, and the format to be noted is that each data has a comma before it, and the last data ends with a semicolon. The fitting coefficient used mentioned above is floating point. During the simple processing, the fitting coefficient is multiplied by 10000, and then the remaining decimal places are discarded (although in general, floating point to fixed point conversion are used. Multiply by 2).

The experience of using block RAM in 6 series FPGAs (3)

After no problem, click generate to generate an IP call. This time is often a bit long.

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